Design of a CMOS Op-Amp and Second Order Sigma Delta Analog to Digital Converter Using 0.18 µ µµ µm CMOS Technology
Keywords:
Analog Circuit, 2-stage CMOS Operational Amplifie, High FrequencyAbstract
This paper presents the design of a CMOS OP-AMP and second order single bit Sigma-Delta Analog-to-Digital Converter (ADC) which is realized using CMOS technology. In this paper, of a CMOS OP-AMP and Second order Sigma Delta ADC is designed which accepts an input signal of frequency 2 KHz, an OSR of 153, and 240 KHz sampling frequency .It is implemented in a standard 0.18um CMOS technology. The ADC operates at 0.7 V reference voltage. The Design and Simulation of the Modulator is done using Microwave offive sofware(9.1).This paper Sigma Delta Modulator. Op-amp which is a key componentused in the design, has the open loop voltage gain of 65db, Phase Margin of 44.5 Degree, output resistance of 130.5KΩ, and power dissipation of 0.096 mW. A CMOS OP-AMP and second order single bit Sigma Delta ADC is implemented using ±3.0 power supply and simulation results are plotted using Microwave offive sofware(9.1).After the modulator is designed, the output pulse train of the modulator is transferred from Microwave offive sofware(9.1) to MatlabWorkspace[9].
References
M. A. Aguirre, J. Chávez, A. Torralba, and L. G. Franquelo, “Analog design optimization by means of a tabu search approach,” in Proc. IEEE Int. Symp. Circuits Syst., vol. 1, 1994, pp. 375–378.
B. K. Ahuja, “An improved frequency compensation technique for CMOS operational amplifiers,” IEEE J. Solid-State Circuits, vol. 18, pp. 629–633, Dec. 1983.
P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, 1st ed., U.K.: Oxford, 1987.
B. A. A. Antao, “Trends in CAD of analog ICs,” IEEE Circuits Devices Mag., vol. 12, no. 5, pp. 31–41, Sept. 1996.
K. J. Antreich and H. E. Graeb, “Circuit optimization driven by worst-case distances,” in Proc. IEEE Int. Conf. Computer-Aided Design, 1991, pp. 106–169.
J. Assael, P. Senn, and M. S. Tawfik, “A switched capacitor filter silicon compiler,” IEEE J. Solid-State Circuits, vol. 23, pp. 166–174, Feb. 1988.
M. Avriel, R. Dembo, and U. Passy, “Solution of generalized geometric programs,” Int. J. Numer. Methods Eng., vol. 9, pp. 149–168, 1975.
A. Barlow, K. Takasuka, Y. Nambu, T. Adachi, and J. Konno, “An integrated switched-capacitor filter design system,” in Proc. IEEE Custom Integrated Circuit Conf., 1989, pp. 4.5.1–4.5.5.
C. S. Beightler and D. T. Phillips, Applied Geometric Programming. New York: Wiley, 1976.
S. Boyd and L. Vandenberghe (1997), Introduction to convex optimization with engineering applications. Stanford Univ., Stanford, CA. [Online] http://www.stanford.edu/class/ee364/
R. K. Brayton, G. D. Hachtel, and A. Sangiovanni-Vincentelli, “A survey of optimization techniques for integrated-circuit design,” Proc. IEEE, vol. 69, pp. 1334–1362, Oct. 1981.
L. R. Carley, G. G. E. Gielen, R. A. Rutenbar, and W. M. C. Sansen, “Synthesis tools for mixed-signal ICs: Progress on frontend and back-end strategies,” in Proc. 33rd Annu. Design Automation Conf., 1996, pp. 298–303.
L. R. Carley and R. A. Rutenbar, “How to automate analog IC designs,” IEEE Spectrum, vol. 25, pp. 26–30, Aug. 1988.
International Journal of Advances in Engineering & Technology, July 2012, Vol.4, Issue 1, pp. 456–464.
Downloads
How to Cite
Issue
Section
License
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.
