Optimized Design of Efficient Finite Impulse Response Filter using Radix-4 Booth Multiplier
Keywords:
Common Boolean Logic Adder, Xilinx Software, Finite Impulse Response, Radix-4, Booth MultiplierAbstract
The main objective of this research paper is to design architecture for finite impulse response (FIR) filter using radix-4 booth multiplier and common Boolean logic (CBL) adder. Finite Impulse response (FIR) filters are extensively utilized in digital signal processing in which different filter parts operate at different rates. It has applications in communication transmitters and receivers. FIR filters when implemented use multipliers and accumulators. There are various types of multiplier structure algorithms and their variations such as Combinational multiplier, Wallace Tree multiplier, Array multiplier and Sequential multiplier and Booth multiplier. Booth multipliers reduce the resulting number of partial products generated as a result of multiplication of two binary numbers. FIR filter has been implemented using with radix-4 booth recoding algorithm. The implement system is simulated Xilinx software and calculated parameters i.e. number of slice, look up table and delay.
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