Study of QSD Addition / Subtraction using Bidirectional Reversible Logic Gate

Authors

  • Kanu Priya Singh, Prof. Satyarth Tiwari

Keywords:

Multi-Valued Logic Circuit, Quaternary Signed Digit (QSD), Addition, Subtractor

Abstract

Researchers in VLSI technology have been engaged in multi-valued logic circuits (quaternary) for the past few years. The motivation behind this work is that multi-valued logic extends both theoretical and applied logic, where the traditional truth values “true” and “false” are replaced by several discrete values. Due to carry propagation, complexity, and delay introduced in adder circuits, arithmetic operations such as addition, subtraction, and multiplication experience increased delay in the arithmetic logic unit. In order to reduce this delay, carry-free addition is introduced using QSD (Quaternary Signed Digit) numbers. In this paper, a study of QSD addition and subtraction circuits using reversible logic gates is presented.

References

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How to Cite

Kanu Priya Singh, Prof. Satyarth Tiwari. (2023). Study of QSD Addition / Subtraction using Bidirectional Reversible Logic Gate. International Journal of Research & Technology, 11(1), 55–59. Retrieved from https://ijrt.org/j/article/view/683

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