VLSI Architecture for Bidirectional Logic Gate Based on Higher Bit QSD Addition / Subtraction
Keywords:
Reversible Gate, DPG Gate, Quaternary Signed Digit (QSD), Xilinx SoftwareAbstract
With the exponential increase of data processing and storage needs, there is strong momentum to move toward higher-radix logic/number systems that can eliminate many limitations of the binary system. The anticipated saturation of Moore’s law and the need to increase information density and processing speed in future micro- and nanoelectronic circuits and systems provide strong background and motivation for beyond-binary logic systems. For low-power and real-time applications, computationally intensive digital signal processing algorithms are implemented in dedicated VLSI systems. The computation speed of a processor is highly dependent on its arithmetic units. In order to reduce delay, carry-free addition is introduced using QSD (Quaternary Signed Digit) numbers. In this paper, a fast QSD addition and subtraction circuit is designed using DPG reversible logic gates.
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