High Speed Complex Vedic Multiplier using Hybrid Square Brent Kung Adder Technique
Keywords:
Vedic Multiplier, Complex Multiplier, Hybrid Square Kogge Stone Adde, Brent Kung Adder, Xilinx SoftwareAbstract
The main objective of this research paper is to design architecture for complex Vedic multiplier by rectifying the problems in the existing method and to improve the speed by using the Brent Kung adder with the help of hybrid square technique. The Vedic multiplier algorithm is normally used for higher bit length applications and ordinary multiplier is good for lower order bits. In this paper design complex multiplier with the help of Vedic multiplier and Brent Kung adder is present. The proposed algorithm is implementation Xilinx software with Vertex-7 device family.
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