Survey Paper on Matrix Multiplier Module and its FPGA Implementation
Keywords:
Matrix Multiplier, Digital Signal Processing, FPGAAbstract
In the present scenario, the rapid growth of wireless communication, multimedia applications, robotics and graphics increases the demand for resource efficient, high throughput and low power digital signal processing (DSP) systems. Matrix multiplication (MM) is the most widely used fundamental processing element in almost all DSP systems ranging from audio/video signal processing to wireless sensor networks. Hardware implementation of matrix multiplication requires a huge number of arithmetic operations that affect the speed and consumes more area and power. Pipelining and parallel processing are the two methods used in the DSP systems to reduce the dynamic power consumption. Demand for high performance processing element with less area and low power increases in various scientific computing applications.
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