VLSI Architecture for 4-bit & 8-bit Universal Shift Register uisng Reversible D-FF
Keywords:
Serial in Serial Output (SISO), Serial in parallel out (SIPO), Parallel in Serial out (PISO), Parallel in Parallel out (PIPO), Maximum FrequencyAbstract
Shift registers are the basic components in Very Large Scale Integration (VLSI) circuit design, which are used in various applications like communication transceivers, digital filters, cryptography circuits and network security devices. The expansion of word length in shift registers makes it appropriate for processing large scale data, since the data generated from various devices are of high quality one. Flip Flops (FFs) are the primary gadgets to integrate the shift register, where the numeral devices are interconnected with one other in series with respect to the register length. The performance of the shift register is prejudiced by key drivers such as area occupancy and energy consumption of the internal functional units. The target device used for implementation of linear feedback shift register is Xilinx software with Spartan-3 device family. The output waveforms and timing report are also discussed.
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