Survey of Adjoint Matrix for FPGA Implementation the Triangular Matrix
Keywords:
Adjoint Matrix, FPGA Implementation, Booth MultiplierAbstract
Due to advancement of new technology in the field of VLSI and Embedded system, there is an increasing demand of high speed and low power consumption processor. Speed of processor greatly depends on its multiplier as well as adder performance. Employing the more characteristics of both the triangular matrix and its inversion, the proposed diagonal-wise algorithm for the triangular matrix inversion has the high parallelism and extensibility in the hardware implementation and is suitable for the different matrix triangular factorization (QR, LDL, Cholesky and LU). Meanwhile, the recursive diagonal-wise algorithm is designed for the large scale triangular matrices. Compared with the traditional row-/column-wise methods, our algorithm has a good performance at the low computation load. In this paper, we introduce an architecture that studied of matrix multiplication using booth multiplier and different types of adder.
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