Survey of Different Types of Shift Register Based on Linear Feedback System
Keywords:
Serial in Serial Out (SISO), Serial in Parallel Out, Parallel in Serial Out, Parallel in Parallel OutAbstract
This paper reviews Bit Linear Feedback Shift Register (LFSR) which generates pseudo-random test patterns as the input bit is a linear function of its previous state. The total number of random states generated on LFSR depends on the feedback polynomial. As it is a simple counter, it can count a maximum of 2n−12^n - 12n−1 by using a maximum feedback polynomial. In this paper, we study 16-bit different types of shift registers on FPGA using VHDL and analyze the behavior of randomness. The analysis is carried out to find the number of gates, memory, and speed requirements in FPGA as the number of bits is increased. Also, the simulation problem for long-bit LFSR on FPGA is presented. The design is simulated and synthesized in Xilinx software.
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