Design And Analysis Of 1-Bit Transmission Gate Adders
Abstract
Addition is probably the most commonly used arithmetic operation. It also forms the basic for many processing operations from counting to multiplication to filtering. Even for performed to increment the program counter and to calculate addresses. Often it is also the speed limiting element. Therefore careful optimization is of almost importance.
In this paper we have briefly discussed the design of Transmission gate based Adder. We have analyzed its performance based on speed, power and Power Delay Product and having its comparative chart. Transmission gate based Adder consumes approximately 54.7%-66% less power as compare to Conventional Adder.
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