Ankesh Singh, Prof. Suresh. S. Gawande, Prof. Sher Singh. “FPGA Implementation of Digital IF Filter With Low Complexity and Less Delay Using Multi-Rate Approach”. International Journal of Research & Technology 8, no. 4 (December 3, 2020): 182–185. Accessed March 31, 2026. https://ijrt.org/j/article/view/543.