Veer Pal Singh , Prof. Nishi Pandey , Prof. Abhishek Agwekar. “VLSI Architecture for Universal Shift Register Using DFF Based on PG and FG Reversible Gate ”. International Journal of Research & Technology 10, no. 2 (July 21, 2022): 20–23. Accessed February 14, 2026. https://ijrt.org/j/article/view/274.