Ankesh Singh, Prof. Suresh. S. Gawande, Prof. Sher Singh (2020) “FPGA Implementation of Digital IF Filter with Low Complexity and Less Delay using Multi-rate Approach”, International Journal of Research & Technology, 8(4), pp. 182–185. Available at: https://ijrt.org/j/article/view/543 (Accessed: 15 August 2026).