ASHUTOSH KUMAR SINGH, DR. MANISH JAIN. Adder Design Methodologies and Limitations Using CMOS Circuits : Study and Review. International Journal of Research & Technology, [S. l.], v. 5, n. 2, p. 01–04, 2017. Disponível em: https://ijrt.org/j/article/view/367. Acesso em: 13 sep. 2025.