RAMSWAROOP PATIDAR, PROF. DIVYA JAIN. VLSI Architecture for 4-bit & 8-bit Universal Shift Register uisng Reversible D-FF. International Journal of Research & Technology, [S. l.], v. 10, n. 2, p. 24–28, 2022. Disponível em: https://ijrt.org/j/article/view/275. Acesso em: 2 apr. 2026.