VEER PAL SINGH , PROF. NISHI PANDEY , PROF. ABHISHEK AGWEKAR. VLSI Architecture for Universal Shift Register using DFF based on PG and FG Reversible Gate . International Journal of Research & Technology, [S. l.], v. 10, n. 2, p. 20–23, 2022. Disponível em: https://ijrt.org/j/article/view/274. Acesso em: 13 feb. 2026.